Intel Codename Alder Lake (ADL) Developer Guide

Started by JeGX, October 18, 2021, 06:28:59 PM

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Alder Lake (ADL) is a new Intel hybrid CPU architecture that combines two core types: "Performance" (P-cores, also known as Golden Cove) and "Efficient" (E-cores, also known as Atom or "Gracemont"). This Developer Guide targets game developers and provides the architecture brief and best practices for game optimization using the Alder Lake architecture.


Modern CPU architectures have decades of evolution, experience, and knowledge inside, and they continue to improve. CPUs have evolved from simple, single-core silicon with tens of thousands of transistors, to multicore, multipurpose systems with billions of transistors. Now comes Intel's latest CPU architecture, code-named Alder Lake (ADL). For the first time, personal computer CPUs will include hybrid cores—a combination of "Performance" cores and "Efficient" cores. That mix will allow developers to take advantage of high-performance and power-efficient multicore CPUs for modern workloads, including computer games.

Developers might already be familiar with hybrid architectures, including "Performance" (high-performance), and "Efficienty" (power-efficient) cores in the mobile phone industry, where such products have been available for a number of years. Those benefits will now become available for desktop computers and notebooks.

This significant architecture change means developers will need to understand the specifics, incorporate new design goals, and make key decisions around best practices to create efficient software that utilizes all available capabilities and features. Properly detecting CPU topology is critical for obtaining optimal performance and compatibility for applications running on hybrid processors. Prior assumptions about hyper-threading between physical and logical processors may no longer hold true, and, if not resolved, could cause serious system issues. Developers must fully enumerate the available logical processors on a system to optimize for power and performance.

This document will provide information on architecture, programming paradigm, detection, and optimization strategies and examples.