AMD HD 6900 (Northern Islands) Series Instruction Set Architecture Guide
AMD has published a detailed reference guide about Northern Islands family processors: HD 6900 Series Instruction Set Architecture:
This document describes the environment, organization, and program state of the
AMD HD 6900 series of devices. It details the instruction set and the microcode
formats native to this family of processors that are accessible to programmers
The AMD HD 6900 series of processors implements a parallel microarchitecture
that provides an excellent platform not only for computer graphics applications
but also for general-purpose streaming applications. Any data-intensive
application that can be mapped to a 2D matrix is a candidate for running on an
AMD HD 6900 series processor.
It includes a data-parallel processor (DPP) array, a command processor, a
memory controller, and other logic (not shown). The HD 69XX command
processor reads commands that the host has written to memory-mapped HD
69XX registers in the system-memory address space. The command processor
sends hardware-generated interrupts to the host when the command is
completed. The HD 69XX memory controller has direct access to all HD 69XX
device memory and the host-specified areas of system memory. To satisfy read
and write requests, the memory controller performs the functions of a directmemory
access (DMA) controller, including computing memory-address offsets
based on the format of the requested data in memory.
You can download the HD 6900 Series Instruction Set Architecture guide HERE.
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