ATI R700 GPU Instruction Set Architecture
AMD/ATI has published a 392-page PDF about instruction set architecture (ISA) of the R700 GPU. This paper is intended for programmers.
We can find many interesting things. For example, we can read that a VS (vertex shader) can output vertices either in a position buffer or in a VS ring buffer if a GS (geometry shader) is active. We learn also that burst memory reads are not supported by the RV770 GPU (the GPU behind the Radeon HD 4850 and 4870). But all GPUs after the RV770 (RV710, RV730, RV740 and the very last RV790) support burst memory reads. Burst memory reads allow up to 16 consecutive locations to be read into up to 16 GPRs (general purpose register).
The paper also contains a glossary of terms where all common terms used in 3D graphics cards field are explained.
You can download this paper here: